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[CS.AI] LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design

Published at: 2026-10-17 22:00 Last updated: 2026-10-18 08:05
#optimization #Open Source #Artificial Intelligence

Machine learning for analog IC design has been hampered by a shortage of open data and the lack of standardized evaluation. Reported results are usually obtained on custom, often closed, datasets and evaluated with ad‑hoc metrics, making cross‑method comparison unreliable. To close these gaps we release a large open‑source dataset together with a suite of standardized benchmarks. The dataset, built on the SkyWater130 PDK, contains over 100 op‑amp topologies (1‑, 2‑, and 3‑stage). Each topology is accompanied by structural and functional annotations, topology‑specific sizing constraints (symmetry and sizing rules), an Ngspice testbench, and a single NSGA‑II multi‑objective run that yields roughly 10^3 Pareto‑optimal and 10^6 intermediate size‑performance pairs. On top of this data we define six benchmark tasks with precise protocols: inverse sizing, topology selection, sub‑circuit classification, structural circuit generation, Pareto‑membership prediction, and multi‑objective optimization. This constitutes the most comprehensive public dataset for analog IC design automation in more than four decades. All ground‑truth annotations, benchmark implementations, and metric‑defining scripts are released under an open license, enabling reproducible and directly comparable evaluation across heterogeneous design automation approaches.

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Original Source: https://arxiv.org/abs/2610.21591

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